# Problem Adding two extra Ethernet ports to Pi
**URL:** https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926
**Category:** Uncategorized
**Created:** [18 April 2021 08:57 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926 "2021-04-18T08:57:04Z")
**Posts on this page:** 20
**Page:** 1
### Author:  [@Clem73666](https://forum.core-electronics.com.au/u/Clem73666)
#### Post date: [18 April 2021 08:57 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/1 "2021-04-18T08:57:04Z")
I need to add another two Ethernet ports to the Raspberry Pi3B or Pi4.
I have come across this site: [Add a WIZ820io / USR-ES1 - Wiznet W5500 Network Port to Your Raspberry Pi. : 10 Steps - Instructables](https://www.instructables.com/Add-a-WIZ850io-Wiznet-W5500-Network-Port-to-Your-R/)
Uses the Wiznet module: WIZ820io [https://www.wiznet.io/product-item/wiz820io/](https://www.wiznet.io/product-item/wiz820io/) which uses the W5500 chip, communicating via
SPI0-0 bus over the Pi 40 connector.
I have made up a Vero board which plugs into the Pi 40 way connector and wired as follows:
WIZ820io\_0 Raspberry Pi
J1 Name Name Pin#
1 GND GND 6
2 GND
3 MOSI MOSI 19
4 SCLK SCLK 23
5 SCNn CE0 24
6 INTn GPIO25 22
J2
1 GND GND 6
2 3V3 3V3 1
3 3V3
4 NC
5 RSTn GPIO17 11
6 MISO MISO 21
WIZ820io\_1
J1 Name Name Pin#
1 GND GND 6
2 GND
3 MOSI MOSI 19
4 SCLK SCLK 23
5 SCNn CE1 26
6 INTn GPIO25 22
J2
1 GND GND 6
2 3V3 3V3 1
3 3V3
4 NC
5 RSTn GPIO17 11
6 MISO MISO 21
I have done this so that I can plug in WIZ820io\_0 OR WIZ820io\_1, OR both and connect them to my switch so that I can ping
them from another computer. So there are 4 cases:
case(A) WIZ820io\_0 empty, WIZ820io\_1 empty
case(B) WIZ820io\_0 populated, WIZ820io\_1 empty
case(C) WIZ820io\_0 empty, WIZ820io\_1 populated
case(D) WIZ820io\_0 populated, WIZ820io\_1 populated
Append these four lines to the /boot/config.txt file:
dtoverlay=anyspi,spi0-0,dev=“W5500”,speed=30000000
dtoverlay=W5500
dtoverlay=anyspi,spi0-1,dev=“W5500”,speed=30000000
dtoverlay=W5500
I set Eth1 to static IP 192.168.1.205 by appending these lines to the /etc/dhcpcd.conf file:
inteface eth1
static ip\_address=192.168.1.205/24
static routers=192.168.1.1
static domain\_name\_servers=192.168.1.1
ifconfig:
case(A) Eth0:
case(B) Eth0: Eth1:
case(C) Eth0: Eth1:
case(D) Eth0: Eth1:
Note Eth0 is the unused ethernet port on the PI.
I was expecting case(D) Eth0: Eth1: Eth2
I can ping Eth1: in case(B) and not in any other case.
IF I rewire case (C) so that for WIZ820io\_1 SCn goes to CE0 (p24) instead of CE1(p26) then I can ping Eth1:
I again rewired WIZ820io\_1 so that SCn goes to 3V3 and Case(D) still does not work. It seems that the chip select pin
SCn is not releasing the SPI bus.
WHy does this not work?
There are at least 2 problems here:
1. The WIZ820io does not seem to release the SPI bus properly when high thus interfering with the other device on the bus.
Should not I be able to put multiple SPI devices on an SPI bus?
2. The configuration line does not seem to be behaving:
dtoverlay=anyspi,spi0-0,dev=“W5500”,speed=30000000
dtoverlay=W5500
I have tried just with this line and tried editing spi0-0 to spi0-1, to spi1-1, none of these makes any diference to the
configuration.
Please advise what commands I should be using?
Please advise how I can get the two extra WIZ820io modules working on the Pi.
Thanks:
---
### Author:  [@Oliver33](https://forum.core-electronics.com.au/u/Oliver33)
#### Post date: [18 April 2021 09:12 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/2 "2021-04-18T09:12:24Z")
It’s difficult to understand what’s going on from a text description. Can you post a photo or a diagram?
In general, no, you can’t have multiple slave devices on an SPI device - this can only be done in a specific case where you’re using a chip select line - which is really only a host and a slave at any one time, the host is just able to choose which one it communicates with.
[https://learn.sparkfun.com/tutorials/serial-peripheral-interface-spi/all#multiple](https://learn.sparkfun.com/tutorials/serial-peripheral-interface-spi/all#multiple)
---
### Author:  [@Clem73666](https://forum.core-electronics.com.au/u/Clem73666)
#### Post date: [18 April 2021 11:15 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/3 "2021-04-18T11:15:02Z")
[https://www.google.com/search?q=spi+bus&tbm=isch&source=iu&ictx=1&fir=A7EbpBYOQVNOSM%2Cig3TxowYO-DvMM%2C%2Fm%2F01y09h&vet=1&usg=AI4\_-kRqX3dmHM4eWoL6zxkqOHPvmvrYLg&sa=X&ved=2ahUKEwiJ1Kel04fwAhVHyzgGHZqmCx8Q\_B16BAgxEAE#imgrc=A7EbpBYOQVNOSM](https://www.google.com/search?q=spi+bus&tbm=isch&source=iu&ictx=1&fir=A7EbpBYOQVNOSM%252Cig3TxowYO-DvMM%252C%252Fm%252F01y09h&vet=1&usg=AI4_-kRqX3dmHM4eWoL6zxkqOHPvmvrYLg&sa=X&ved=2ahUKEwiJ1Kel04fwAhVHyzgGHZqmCx8Q_B16BAgxEAE#imgrc=A7EbpBYOQVNOSM)
> **[Serial Peripheral Interface](https://en.wikipedia.org/wiki/Serial_Peripheral_Interface)**
>
> The Serial Peripheral Interface (SPI) is a synchronous serial communication interface specification used for short-distance communication, primarily in embedded systems. The interface was developed by Motorola in the mid-1980s and has become a de facto standard. Typical applications include Secure Digital cards and liquid crystal displays.
> SPI devices communicate in full duplex mode using a master-slave architecture with a single master. The master device originates the frame for reading and wri...
diagram titled: Typical SPI bus: master and three independent slaves
surly this is how the Pi is set up, it has select lines: SPI0 CE0 pin 24, SPI0 CE1
The SPI bus is a master multiple slave arrangement. The Pi provides CE0 and CE1 slave select lines on SPI bus0
Why provide CE0 and CE1 both for SPI0 - it only makes sense if the intention is t0 implement at least 2 slave devices on the SPI0 bus.
---
### Author:  [@Clem73666](https://forum.core-electronics.com.au/u/Clem73666)
#### Post date: [18 April 2021 11:41 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/4 "2021-04-18T11:41:26Z")
---
### Author:  [@Clem73666](https://forum.core-electronics.com.au/u/Clem73666)
#### Post date: [18 April 2021 12:48 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/5 "2021-04-18T12:48:05Z")
---
### Author:  [@Clem73666](https://forum.core-electronics.com.au/u/Clem73666)
#### Post date: [18 April 2021 23:30 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/6 "2021-04-18T23:30:49Z")
---
### Author:  [@Oliver33](https://forum.core-electronics.com.au/u/Oliver33)
#### Post date: [19 April 2021 17:09 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/7 "2021-04-19T17:09:51Z")
There’s an awful lot of levels where problems could be occurring - wiring, communication protocols, data encoding, kernel driver implementation, [SPI implementations](https://en.wikipedia.org/wiki/Serial_Peripheral_Interface#Valid_communications), and these can all be doubled up because both the Pi and the Ethernet Chip will need to work in compatible ways, so you’ll need to check each of them. More than 2 ethernet ports on a Pi is quite an unusual requirement so it’ll be difficult to find examples from people who’ve tried to do this in the past.
This is venturing well into the territory of professional engineering - it’s pretty complex stuff. Are you specifically trying to develop a Pi Hat with multiple Ethernet ports? And if you are, why? What’s the use case? A Pi as a networking device/teaching tool?
Why not just use a [USB-\> Ethernet adapter](https://www.lindy.com.au/usb-3-0-dual-gigabit-ethernet-adapter?gclid=Cj0KCQjw1PSDBhDbARIsAPeTqreOQTkMP7S5L1h7PjlNEp0PCGNde9EAmlkSThnb0-Oj6lLViKeYtPgaApKKEALw_wcB)? Or a cheap Ethernet switch - you can get [a second hand 24 port switch](https://www.gumtree.com.au/s-ad/rouse-hill/modems-routers/24-port-network-switch/1270840046) for under $100.
This is only one specific solution to whatever your actual problem is, and there are easier ways to do it. What’s your _real_ goal?
As for trying to get this working specifically, have you checked the datasheet for the WiZ820io, and the datasheet for whatever ethernet interface it’s using? Particularly, have you checked whether the Ethernet inteface will be happy to share the SPI bus with other devices?
[https://www.wiznet.io/product-item/wiz820io/](https://www.wiznet.io/product-item/wiz820io/)
> **[WIZ820io\_User\_Manual\_V1.0.pdf](https://wiznethome.cafe24.com/wp-content/uploads/wiznethome/Network%20Module/WIZ820io/Document/WIZ820io_User_Manual_V1.0.pdf)**
>
> 660.42 KB
> **[W5200\_DS\_V140E.pdf](https://wiznethome.cafe24.com/wp-content/uploads/wiznethome/Chip/W5200/Documents/W5200_DS_V140E.pdf)**
>
> 1450.78 KB
Have you been over the Pi documentation too?
> **[Teach, Learn, and Make with Raspberry Pi – Raspberry Pi](https://www.raspberrypi.org/documentation/hardware/raspberrypi/spi/README.md)**
>
> The Raspberry Pi is a tiny and affordable computer that you can use to learn programming through fun, practical projects. Join the global Raspberry Pi community.
[https://elinux.org/RPi\_SPI](https://elinux.org/RPi_SPI)
---
### Author:  [@Clem73666](https://forum.core-electronics.com.au/u/Clem73666)
#### Post date: [20 April 2021 00:25 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/8 "2021-04-20T00:25:05Z")
My specific application requires a Pi platform which has an Ethernet port to interface to a network and two extra Ethernet ports of lower speed which are low cost and can be split out in a configuration that is unique, I will also need to make many of these and it needs to be a solution which I can build not buy. So NO I cannot consider using a switch that is way too expensive and bulky etc, needs to be a simple low cost purpose manufacturable part. There are ultimately innovations in this and so I cannot use an off the shelf solution because it will not provide me with the flexibility that I require. The ultimate reason for the two extra ports is a redundant bus, and so there MUST be two separate ports. When I read the information in the link I provided how someone so easily got a single port working I expected that this would be similarly simple to add a second extra port since the descriptions clearly provide for a second SPI device in the pin descriptions, further the SPI buss in INTENDED to provide for for multiple slave devices - that aught to be NORMAL. I have not researched the Pi software etc as I do not know much about this, I should expect it to work in a logical manner. I have put this on the forum because I know there are skilled people who know these details which I do not - that is the purpose of the forum surly. I am asking for help because this is exactly the purpose and type of problem which the forum exists to help. I have no idea how to dig into the Pi software operating . driver issues but it aught to match the logical pinout of the hardware connector and provides the functionality which is self evident from the circuitry.
This should simply work - I have no idea how to find why the configuration instructions do not seem to be behaving properly or how I might adjust them. So can someone please help me.
---
### Author:  [@Clem73666](https://forum.core-electronics.com.au/u/Clem73666)
#### Post date: [20 April 2021 01:15 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/9 "2021-04-20T01:15:21Z")
Please - lets start with this:
What is the proper command / text to put into the configuration file to get the Pi to find the slave device on the SPIo bus as device 1 instead of device 0?
I used this command:
Append these two lines to the /boot/config.txt file:
dtoverlay=anyspi,spi0-0,dev=“W5500”,speed=30000000
dtoverlay=W5500
When I have one W5500 plugged into the board with its chip select SCNn pin p1.5 connected to the Pi CE0 pin p24,
This works fine both as adding eth1 as seen in the ifconfig command and able to ping the device.
If I now want to use Pi CS1 pin p26 instead of CS0 pin p24, what text must I use in the config file? I expected to use the following:
Append these two lines to the /boot/config.txt file:
dtoverlay=anyspi,spi0-1,dev=“W5500”,speed=30000000
dtoverlay=W5500
It does not work - only one little wire change!
Why not?
What should it be?
I have no idea how to find out?
Please advise
---
### Author:  [@Clem73666](https://forum.core-electronics.com.au/u/Clem73666)
#### Post date: [20 April 2021 03:31 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/10 "2021-04-20T03:31:08Z")
I have just repeated this experiment again:
A)
Put W5500 in slot 2, connected CE0 to SCNn
Append these two lines to the /boot/config.txt file:
dtoverlay=anyspi,spi0-0,dev=“W5500”,speed=30000000
dtoverlay=W5500
ifconfig finds eth1 AND can ping device IP:192.168.1.205
B)
Put W5500 in slot 2, connected CE0 to SCNn
Append these two lines to the /boot/config.txt file:
dtoverlay=anyspi,spi0-1,dev=“W5500”,speed=30000000
dtoverlay=W5500
shutdown, remove power, reapply power
ifconfig finds eth1 AND can ping device IP:192.168.1.205
C)
Put W5500 in slot 2, connected CE0 to SCNn
Append these two lines to the /boot/config.txt file:
dtoverlay=anyspi,spi1-0,dev=“W5500”,speed=30000000
dtoverlay=W5500
shutdown, remove power, reapply power
ifconfig finds eth1 AND can ping device IP:192.168.1.205
D)
Put W5500 in slot 2, connected CE0 to SCNn
Append these two lines to the /boot/config.txt file:
dtoverlay=anyspi,spi1-1,dev=“W5500”,speed=30000000
dtoverlay=W5500
shutdown, remove power, reapply power
ifconfig finds eth1 AND can ping device IP:192.168.1.205
Change circuit configuration to connect CE1 pin26 to SCNn
E)
Put W5500 in slot 2, connected CE1 to SCNn
Append these two lines to the /boot/config.txt file:
dtoverlay=anyspi,spi1-1,dev=“W5500”,speed=30000000
dtoverlay=W5500
shutdown, remove power, reapply power
ifconfig does NOT find eth1 AND CANNOT ping device IP:192.168.1.205
F)
Put W5500 in slot 2, connected CE1 to SCNn
Append these two lines to the /boot/config.txt file:
dtoverlay=anyspi,spi1-0,dev=“W5500”,speed=30000000
dtoverlay=W5500
shutdown, remove power, reapply power
ifconfig does NOT find eth1 AND CANNOT ping device IP:192.168.1.205
G)
Put W5500 in slot 2, connected CE1 to SCNn
Append these two lines to the /boot/config.txt file:
dtoverlay=anyspi,spi0-1,dev=“W5500”,speed=30000000
dtoverlay=W5500
shutdown, remove power, reapply power
ifconfig does NOT find eth1 AND CANNOT ping device IP:192.168.1.205
H)
Put W5500 in slot 2, connected CE1 to SCNn
Append these two lines to the /boot/config.txt file:
dtoverlay=anyspi,spi0-0,dev=“W5500”,speed=30000000
dtoverlay=W5500
shutdown, remove power, reapply power
ifconfig does NOT find eth1 AND CANNOT ping device IP:192.168.1.205
SO:
There are no wiring problems here;
What is the correct way to configure the Pi to talk to SPI0:1 slave device instead of SPI0:0 slave device?
There is defiantly a problem here and I need to know what the solution is.
Regards
---
### Author:  [@Oliver33](https://forum.core-electronics.com.au/u/Oliver33)
#### Post date: [20 April 2021 11:49 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/11 "2021-04-20T11:49:11Z")
You’re running headlong into a minefield because you’ve got a fundamental misunderstanding/lack of knowledge of the hardware. SPI does not necessarily work the way you believe it does or the way you believe it ought to, nor do the Linux drivers . Exactly how it works can very much be implementation specific - and I am yet to see anything that describes connecting multiple of these chips explicitly.
I’m not saying this is a technically impossible solution - I’m saying it’s infeasible. This in and of itself is a significant engineering challenge - a commercial budget for this would reasonably be around $30k. The Core guys are great, but I’m pretty sure they’re not engineers - it’s not reasonable to expect to buy a $100 Raspberry Pi and get $30k of engineering support with it for free out of them, I’m fairly certain you’re just unaware of how complex and difficult what you’re trying to do is. Getting this working IS going to require getting out an oscilloscope/logic analyzer and checking what’s actually happening in the circuit, and possibly modifying the network and SPI drivers in the Linux kernel. I’ve provided you direct links to the documentation you need to start reading if you want to continue down this path.
The only ones who might have answers for you without needing to completely engineer you a custom solution are engineers/devs who’ve worked with the Wiz ethernet chip (eg. sparkfun and Adafruit make PCBs with this chip), and/or Raspberry Pi devs - because they’re already familiar with these specific bits of hardware and won’t need to learn them. Other than that, I’d strongly recommend contacting an electronics product design and engineering consultancy who specialise in taking ideas and inventions and turning them into marketable products - that way you can sign a contract to protect your IP.
Also, two ethernet connections on the same Pi does not make a redundant system, so I’m not sure what this solution actually achieves or what kind of redundancy you hope/need to gain. About all it does is double the probability you’ll have a communications failure on at least one of your ethernet interfaces.
Whatever you’re trying to do, there are much better ways to do it. If you want advice and help, my advice is that you are way off track. You need to go back about 5 or 10 steps and reconsider how and why you ended up here, rather than plowing on with trying to solve your problem with this specific solution. You need to share some higher level information about your project and overall goals so you can get help from the community that will get you back on track with whatever it is you’re trying to do.
I’m no electronics engineer though, this is just a hobby for me and I like helping out.
@Robert93820 Bob; what’s your 2c on this? I’m betting you know a thing or two about SPI and Ethernet.
Edit: Oh and PS - here’s the datasheet for the BCM2835 - [https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf](https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf)
Looks like you’ll want to read Chapter 10.
And here’s the SPI driver in Pi OS: [linux/spi-bcm2835.c at 7fb9d006d3ff3baf2e205e0c85c4e4fd0a64fcd0 · raspberrypi/linux · GitHub](https://github.com/raspberrypi/linux/blob/7fb9d006d3ff3baf2e205e0c85c4e4fd0a64fcd0/drivers/spi/spi-bcm2835.c)
---
### Author:  [@Oliver33](https://forum.core-electronics.com.au/u/Oliver33)
#### Post date: [20 April 2021 17:00 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/12 "2021-04-20T17:00:52Z")
Actually, here’s someone who did it commercially:
> **[Ethernet Dual Shield V 1.1 for Raspberry - SG Electronic Systems](https://www.sg-electronic-systems.com/ethernet-dual-shield-v-1-1-for-raspberry/)**
>
> Ethernet Dual Shield V 1.1 is an Ethernet Shield for RaspBerry Pi. It is an Open Hardware Design. It has two functionalities: a dual Ethernet interface and an on board Real Time clock powered by a 12 mm battery. The Ethernet is based on ENC28J60 a...
And they used the separate SPI interfaces. I’d say there’s a very good reason they didn’t chip select them!
---
### Author:  [@Robert93820](https://forum.core-electronics.com.au/u/Robert93820)
#### Post date: [21 April 2021 03:10 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/13 "2021-04-21T03:10:30Z")
Hi Oliver
> [@Oliver33](#):
>
> Bob; what’s your 2c on this? I’m betting you know a thing or two about SPI and Ethernet.
Sorry, mostly nothing. I am really basically an analog person. Fiddle with digital enough to get by. I have worked with logic a bit on different projects but one of the closest to getting serious was the display systems for the computer tote on the 4 Sydney racecourses. Have programmed Mitsubishi PLCs using Ladder Logic system and Mitsubishi Alpha series intelligent relay units where you actually produce a logic circuit using function blocks analog and digital inputs. To do this all you need to do is know what is required at the end of the day, what information in the way of inputs you need and then the best way of getting the required result.
To do this successfully you have to think in a logical manner but when it comes to digital communications like ethernet, SPI and the dozen or so others the engineers tell me this is what it has to do and how it does it and I believe them.
Believe it or not most of the problems I have come across and had to resolve were solved with what you might call an analog approach. One which comes to mind and crops up here on the Forum was on the last big project I looked after for AWA some 20 odd years ago. The digital comms system for diagnostics (I think) they called AUI (Asynchronous Universal Interface). Engineer sitting in front of a rack full of equipment with about 2m cable seemed to be quite happy. As per procedure the system checked with approximate real world conditions (75m cable) and guess what. Did not work. The problem turned out to be analog. The cable termination was effectively about 3kΩ instead of 120Ω. The reflections were adding and subtracting as they do (standing waves) and what was termed “collision detect” was doing its job and shutting the whole thing down. When the forward and reflected signals added the system was fooled into thinking there was more than one slave on line at the same time and shut down.
This is one of the reasons I have pushed this subject on a couple of posts on this forum. I may not know much of the nitty gritty details re how these systems work but I do know how to get it from point A to point B with minimal problems.
As far as doubling up is concerned I don’t know but probably not a good idea. This AUI system was duplicated but the change over was relays which physically switched from one system to the other. This had an impedance matching problem too which I won’t go into here. This whole project was duplicated right down to the 240V mains supply. In fact the Radio system was triplicated, primary, secondary and tertiary.
Cheers Bob
---
### Author:  [@Oliver](https://forum.core-electronics.com.au/u/Oliver)
#### Post date: [21 April 2021 04:01 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/14 "2021-04-21T04:01:25Z")
> [@Clem73666](#):
>
> Append these four lines to the /boot/config.txt file:
> dtoverlay=anyspi,spi0-0,dev=“W5500”,speed=30000000
> dtoverlay=W5500
> dtoverlay=anyspi,spi0-1,dev=“W5500”,speed=30000000
> dtoverlay=W5500
Hi Clem, thanks for making a post!
Here’s the link to the readme for config.txt:
>
There’s actually a dt-overlay for the W5500:
```
Name: w5500
Info: Overlay for the Wiznet W5500 Ethernet Controller on SPI0
Load: dtoverlay=w5500,=
Params: int_pin GPIO used for INT (default 25)
speed SPI bus speed (default 30000000)
cs SPI bus Chip Select (default 0)
```
I’ve never looked this deeply into this before but on a first read it looks like you might be able to get it to work by connecting the interrupt pin for your first device to pin 25, and the interrupt for the second to pin 24, and:
```
dtoverlay=w5500,cs=0
dtoverlay=w5500,cs=1,int_pin=24
```
SPI will be enabled automatically when this device is called according to the readme, so hopefully this is all it takes! @Oliver33 is right that it may not work the way we expect and it could be quite difficult if it doesn’t go to plan.
---
### Author:  [@Clem73666](https://forum.core-electronics.com.au/u/Clem73666)
#### Post date: [21 April 2021 12:32 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/15 "2021-04-21T12:32:22Z")
I have just got a high level interrupt so will be away for a few days - but that does not mean that I am giving up. I KNOW how SPI bus is designed and supposed to work - if Oliver33 thinks that the Pi does not make it possible to implement SPI bus as it was designed - he may be right but that does not mean that that is not how SPI bus is intended to work and any fool can expect to logically proceed on the basis of how SPI is designed to operate!
I want to know why you choose pin 24 as an interrupt pin? The Pi pin out defines pin 24 and pin 26 as SPI0 CS0 and SPI0 CS1 respectfully.
Where do you get this information from how to configure the setup files on the Pi and the information for the parameters for dtoverlay?
regards
---
### Author:  [@Oliver33](https://forum.core-electronics.com.au/u/Oliver33)
#### Post date: [21 April 2021 12:47 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/16 "2021-04-21T12:47:18Z")
> [@Clem73666](#):
>
> Where do you get this information from how to configure the setup files on the Pi and the information for the parameters for dtoverlay?
> [@Oliver](#):
>
> Here’s the link to the readme for config.txt:
>
> [github.com](https://github.com/raspberrypi/linux/blob/rpi-5.10.y/arch/arm/boot/dts/overlays/README)
>
> #### [raspberrypi/linux/blob/rpi-5.10.y/arch/arm/boot/dts/overlays/README](https://github.com/raspberrypi/linux/blob/rpi-5.10.y/arch/arm/boot/dts/overlays/README)
>
> ```auto
> Introduction
> ============
>
> This directory contains Device Tree overlays. Device Tree makes it possible
> to support many hardware configurations with a single kernel and without the
> need to explicitly load or blacklist kernel modules. Note that this isn't a
> "pure" Device Tree configuration (c.f. MACH_BCM2835) - some on-board devices
> are still configured by the board support code, but the intention is to
> eventually reach that goal.
>
> On Raspberry Pi, Device Tree usage is controlled from /boot/config.txt. By
> default, the Raspberry Pi kernel boots with device tree enabled. You can
> completely disable DT usage (for now) by adding:
>
> device_tree=
>
> to your config.txt, which should cause your Pi to revert to the old way of
> doing things after a reboot.
>
> In /boot you will find a .dtb for each base platform. This describes the
>
> ```
>
> This file has been truncated. [show original](https://github.com/raspberrypi/linux/blob/rpi-5.10.y/arch/arm/boot/dts/overlays/README)
Looks like right here where he linked you to ^
Looking at pinout.xyz, he might’ve been referring to GPIO 24, not physical pin 24.
> **[Raspberry Pi GPIO Pinout](https://pinout.xyz/)**
>
> The comprehensive add-on boards & GPIO Pinout guide for the Raspberry Pi
And re SPI not being implemented as designed, it wouldn’t be a first. I know that I2C on the Pi is buggy (I think it’s actually an issue with the Broadcom chip) and does not support clock stretching - which is a completely standard part of I2C.
Here’s an Adafruit article about some of the quirks of SPI on the Pi:
> **[CircuitPython Libraries on Linux and Raspberry Pi](https://learn.adafruit.com/circuitpython-on-raspberrypi-linux/spi-sensors-devices)**
>
> CircuitPython is the best new way to code microcontrollers. But what if you want to run that same code on a more POWERFUL computer like a Raspberry Pi (or really any Linux SBC?) Well now you can - take advantage of the wide collection of drivers and...
Raspberry Pis are first and foremost, teaching devices, not industrial devices and they’re a merging of different computing worlds that don’t normally come together. As a result, they’ve taken some shortcuts in some places for high level ease of use - so they work _most_ of the time easily, but when you get down to the nitty gritty or edge cases they’re weird, unusual, and quirky.
Regarding the redundancy - consider the case of a critical server/datacentre. They use multiple methods for reliability. Hard Drive RAID, Offsite backups, and a completely independent second data centre, then there’s triplicated systems where they use a plausibility analysis.
RAID combats MTBF but it does nothing for environmental situations like a fire, power surge, or power outage. In order to prepare against environmental risk factors you need fully independent systems - off site backups. If you need the system to keep working in the case of a failure, you need to completely duplicate the system. If you’re worried about signal interference you can consider a watchdog timer and/or a plausibility circuit. There’s also things like CRCs used in credit cards.
It’s all reliability engineering, and its complex - but I guarantee you there is a better solution than 2 ethernet ports and cables on a single Pi. Have a read:
> **[1.pdf](https://link.springer.com/content/pdf/bbm:978-3-540-34582-4/1.pdf)**
> **[Reliability engineering](https://en.wikipedia.org/wiki/Reliability_engineering)**
>
> Reliability engineering is a sub-discipline of systems engineering that emphasizes the ability of equipment to function without failure. Reliability describes the ability of a system or component to function under stated conditions for a specified period of time. Reliability is closely related to availability, which is typically described as the ability of a component or system to function at a specified moment or interval of time.
> The reliability function is theoretically defined as the proba...
> **[Error detection and correction](https://en.wikipedia.org/wiki/Error_detection_and_correction)**
>
> In information theory and coding theory with applications in computer science and telecommunication, error detection and correction (EDAC) or error control are techniques that enable reliable delivery of digital data over unreliable communication channels. Many communication channels are subject to channel noise, and thus errors may be introduced during transmission from the source to a receiver. Error detection techniques allow detecting such errors, while error correction enables reconstruction...
> [@Clem73666](#):
>
> I KNOW how SPI bus is designed and supposed to work
A little bit of knowledge is a dangerous thing - especially when coupled with overconfidence and arrogance. Knowing how it’s _supposed_ to work is only half the battle. Someone had to implement it, and they rarely get it completely right - or maybe how it’s _supposed_ to work has changed since the hardware you’re using was manufactured, or maybe there are parts of the standard that aren’t well defined so different manufacturers do different things. 90% of the time, these aren’t problems. Edge cases like yours are where it bites - especially when you’re not just trying to communicate via SPI, you’re trying to do networking as well!
---
### Author:  [@Oliver33](https://forum.core-electronics.com.au/u/Oliver33)
#### Post date: [21 April 2021 13:21 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/17 "2021-04-21T13:21:13Z")
Ah ok, nonetheless, you’re quite a fountain of knowledge and have a lot of experience! I’ve learnt a lot from your posts - especially about cable terminations and signal reflections. It’s amazing how regularly it crops up!
When I was looking into it in the past I found this great video from Tektronix:
[ ](https://www.youtube.com/watch?v=I9m2w4DgeVk)
---
### Author:  [@Oliver](https://forum.core-electronics.com.au/u/Oliver)
#### Post date: [22 April 2021 03:15 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/18 "2021-04-22T03:15:12Z")
Hi Clem,
Here’s the link to the Readme for setting up config.txt: [linux/README at rpi-5.10.y · raspberrypi/linux · GitHub](https://github.com/raspberrypi/linux/blob/rpi-5.10.y/arch/arm/boot/dts/overlays/README)
Info on how to format the config.txt file is all at the top, while the specific info on the W5500 dtoverlay starts on line 3277. I picked GPIO 24 (physical pin 18) because it’s a nearby free pin. Note that there are different numbering conventions for the Pins on a Pi header - the chip selects are on physical pins 24 and 26, but these are GPIO pins 8 and 7, respectively.
Let us know how you go!
---
### Author:  [@Robert93820](https://forum.core-electronics.com.au/u/Robert93820)
#### Post date: [22 April 2021 04:56 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/19 "2021-04-22T04:56:18Z")
Hi Oliver.
AHHH, those old Tektronix oscilloscopes, about the size of 2medium suitcases with a very long 5" CRT. I have used many of these including the one pictured with an unbelievably fast time base. Beautifully built equipment (which was reflected in the price). All termination points and even the solder had a percentage of silver in the alloys. The instruments even had a coil of this special solder rolled up inside the top of the case for repair work. I had a mains transformer fail (green/brown smoke) and would you believe this type of component was guaranteed for the life of the instrument and we had one delivered free in 48 hours. Quality and service we don’t see very often now.
That video should be a compulsory view for anyone involved or are going to be involved with transmission of intelligence from point A to anywhere. It would be good if you can put it up separately so it is not confined to readers of this post. That is exactly what I was on about some time ago and I mentioned above. A very important point often overlooked or completely ignored.
That measurement technique is termed Time Domain Reflectometry. During my 22.5 years with AWA I got involved with Television transmitting antennas, Yes the ones on 500 to 700 ft towers (TCN9 is 785ft)
and this method was used to measure the return loss of the plumbing at the end of the cable. That video shows a return loss of about 6db open circuit which means that length of cable has about 3db loss at the frequencies involved. The TV cable is 3.25 or 4.5 inch diameter and cable losses are very low. We were able to accurately measure return losses of the antenna at something like 40db or a VSWR of about 1.02:1 or reflection co-efficient of about 1% whichever measurement type turns you on. Not bad for an antenna which had 96 full wave or 192 half wave elements as the transmitting medium at the top of that tower. You would have to see it to believe the plumbing and cabling involved.
Silicone Chip some time ago did an article on oscilloscope leads. Especially the higher frequency ones. This is a good read if you can find it. If you have ever measured these leads in the X 1 position you will find the centre conductor is a resistance wire of quite a few ohms. The article goes into the reason behind this and acknowledges the skills and patience of the design engineer at the time who did not have the luxury of computers and transmission line modelling. All done on paper.
Cheers Bob
---
### Author:  [@Oliver33](https://forum.core-electronics.com.au/u/Oliver33)
#### Post date: [22 April 2021 17:02 UTC](https://forum.core-electronics.com.au/t/problem-adding-two-extra-ethernet-ports-to-pi/9926/20 "2021-04-22T17:02:48Z")
Another couple of references regarding redundancy, checkout these videos:
[ ](https://www.youtube.com/watch?v=QEWEFwZfOVU)
[ ](https://www.youtube.com/watch?v=IP-rGJKSZ3s)
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