JK flip flop Q and Q0 not behaving

1

Hi everyone.
Fun puzzle below I’d love your input on.

This circuit below is used to toggle a relay with a button. It works… but the relay module boots in the on position because it’s active low.

“Easy solution” i said “I’ll just use the inverted Q output instead.” The circuit promptly revealed it’s true colours and has consumed my weekend. :stuck_out_tongue:

It’s not the end of the world if I can’t get the working because I could just use the Q output and invert it. But I am really curious about this behavior below.

Here is a video of the setup and the problem.

Schematic of my setup

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Function diagram from the texas instruments 74hc73 datasheet.

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Hi Pix
What is the object here ?? Correct if I am wrong but it looks like you want a push on / push off toggle of some sort. I haven’t tried to digest what you are doing with the 555 and transistor and I don’t have time just now to do that so your description would suffice.

Are you trying to directly drive the relay with the flip flop?? You have not shown enough of the circuit. If so I think we have been down this path before more than once. Depending on the relay the 'HC73 probably might be struggling to drive it. You might have got a bit lucky with the Q output but failed with the Qbar output. The full spec sheet shows an ABSOLUTE max of 25mA source and sink.

A full view of the schematic would probably answer most of this.
Cheers Bob
What do the 3 coloured waveforms represent. Might be my ears but I hardly understood a word of that dialog.

3

Great questions.

Toggle 12v halogens with a push button. :slight_smile:

Fair enough :slight_smile:

  • The button is denounced with a cool 5 second cool-down.
  • The transistor is inverting the output of the denounced button because the 74hc73 is negative edged triggered.

Yeah you mentioned this concern and I that prompted me to run the tests. What we learned in the end is that the 74hc73 was more than happy to drive the relay module I was using. All good news. If with further testing I find it to be unreliable I can always add a transistor.

  • The yellow is the denounced button. It’s being fed into the clock.
  • The pink is the Q output of the 74HC73
  • The cyan is the Q0 output. My belief was that this would just be the inverse of Q in pink. That belief is obviously wrong, but I don’t understand why.

I don’t have a full schematic yet but I am working on it. :slight_smile:
To finish it I need to make a kicad symbol for this relay module.

4

On the board in the video, you have a yellow wire connecting pin 2 to pin 6. (1RST & 2RST) There appears to be no other connection to these pins. The 74hc73 being a CMOS device must have its inputs tied somewhere to stop it being affected by random noise.

The circuit diagram shows “ResetVector” in two places, are they connected ?? If not you have a floating reset pin on the 74hc73 which means it could be affected by random noise.

Regards
Jim

5

Is the clock signal at the JK as ot seems to be inverted from the 555 ?

I suspect what you are seeing is the output reflecting the staging Vs when the output is “valid” to see.

something like this (Im guessing)
when the /CP falls we have a “valid” output. which is what you see.
then when /CP rises (its getting ready for the next round), so /Q = Q
i.e. Output is valid when clock is low.

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Hi Pix
OK so the relay is opto coupled so the "HC73 should drive it. Unfortunately this is another module with no schematic or not easy to get one anyway. You say this is active low so we will go with that.

Where is the debounced switch being measured at. Before or after the transistor.

That is correct. I think you are looking at these waveforms with the relay module connected. Thy it again with the module disconnected. You might find it is working. The '73 output connected to the relay module has a virtual pull up via the opto LED and limiting resistor on the relay board). This could mean that the oscilloscope is looking at a “phantom” 5V via this path.
BUT. The spec sheet quotes an absolute max SOURCE or SINK current so should be push pull output and this should not happen

It looks as if one output actions on the negative clock transition and the other output activates on the positive clock transition and one output operates independently of the other .

Cannot happen.
Mystery.
Clarify the clock measurement position for us and try with relay input disconnected. You never know.
Cheers Bob

7

Then it doesn’t make sense. The outputs should change on the falling edge of the clock. That they are changing (albeit inconsistently) without a falling edge to the clock indicates something else is happening, and that’s likely the CLR. You need to add CLR to that trace.

(Or possibly one of the inputs).

8

Hi Pix
Are you sure of that 555 circuit.
Surely to debounce a switch:
Delete C3
Delete R1
Connect SW1 from pin 2 to ground
To prevent false triggering at switch on, increase R2 to 10kΩ and connect a capacitor from pin 4 to ground. This cap should form a time constant with R2 to prevent 555 operation until C5 has charged to 1/3 Vcc.
Cheers Bob

9

I will assume that the /reset pin “/R” of the JK has been pulled high and not left floating!

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Hi Michael
I believe it is connected to pin 4 of the 555
Cheers Bob

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11

Hey everyone

Thank-you everyone for your thoughts so far. :+1:
I’m glad to provide you all with a good mystery. :stuck_out_tongue:

Let me reply to everything below.

Do you mean the reset pin? :slight_smile:

Yeah they’re operated to the PG pin of this 5v voltage regulator via a FET. On boot, the power good (PG) pin of this regulator is low for a fraction of a second until the VCC output is stable.
Once the regulator has settled then PG goes HIGH and that’s where it stays.

The 555’s and 74hc73’s reset are both active low. All reset pins are tied together with the PG reset vector from the regulator. I should have shown this in the video to remove ambiguity. My bad.

[quote=“Michael99645, post:5, topic:22503”]
Is the clock signal at the JK as ot seems to be inverted from the 555 ?
[/quote
Yes the debounced button is inverted. The inverted debounced button goes to pin 1 which is the clk of the negatively edged triggered 74hc73. :slight_smile: J&K are both tied high. This is to get me that toggle effect. I’m basically turning my momentary button into a switch with a long cool down.

That’s actually a really good thought.
I’m not really using this HC chip as it was intended. It’s probably expecting a 250mhz clock and a register that samples the signal in a certain period of time.

Great question.
After. The Oscilloscopes yellow is the collector of the transistor (Q1).

Good thought. There was no relay plugged in during those oscilloscope measurements so we can rule that out. :slight_smile:

In order to stay alive I have developed a low confidence in all of my designs… so no not really :stuck_out_tongue:

Ah bummer. I rushed the schematic and I got it wrong. Let me clean that up.

At the last second I’ve added the 100nf capacitor that was on the rails of my bread board but In doing so I’ve disconnected the button from ground and gave it a pointless 5v. :man_facepalming:

The good news is that, although the schematic was wrong, my circuit was correct. :white_check_mark:

The schematic below is now reflective of the actual circuit I’ve made.

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Here is another version with an added cap to pin 4.
I’ve re-annotated the schematic.
R2 & C1’s time constant should now be a little over a third of R3 & C3’s.

I’m not sure this RC filter will work because the reset vector itself is essentially tied high.
Maybe I need to consider removing the reset vector entirely.

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More on the RST/CLR signal

OK I want to provide as much detail as possible on the reset vector since it’s the most likely culprit.

Through testing, I learned that the PG output has very little current capacity. It won’t even drive a little led. I added a 2n7000 n channel mosfet just to ensure a nice clean 5v reset.

The reset signal is going to go to many different chips and modules in my project. Each module was going to have there own ~1k ohm pull down resistor.
Maybe I should consider putting a pull down resistor at the source of the mosfet instead. :thinking:

Here is a super quick and dirty schematic.

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Happy to measure the quality of that reset vector if we think it has merit. :slight_smile:.

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The voltage regulator PG pin has the following description in the datasheet. 5M ohm is an extremely weak pullup, probably you may need an external pullup as it says open-drain. Giving it something to drive into will ensure the mosfet works correctly. It also explains why it could not drive a LED. The gate capacitance of the mosfet should be considered too. Pulldown or something on the gate.

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Note: Isink = 3mA, more than enough to drive a RST pin. Just needs something to drive into, ie pullup.

Cheers
Jim

EDIT: Just noticed something else with your circuit. The 2N7000 is a N-Channel mosfet, it turns on when a positive is on the gate and needs a pull down to discharge the gate capacitance when off. In other circuit drawing you have ResetVector with a 1k pullup and another with a 10k pulldown.

PG is low when the voltage regulator is not regulating, the RST pins are active low. You will need to find a way to keep the RST pins low when PG is low. I dont think a 10k pulldown will be good enough.

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13

Something else.
In all 555 one-shot circuits I have seen pin 4 RST is connected to VCC.
You don’t really need to reset it, the 555 powers up in a reset condition and only changes when it receives a trigger.

14

Yes. The point is to resolve the question of the change of state before worrying about the inconsistency between the two levels. The reason is that if they only change state on a clock signal then that might resolve the issue of the inconsistent levels (if they don’t change then perhaps they never get out of step), but sorting out why they are inconsistent is less likely to answer the question of why they are changing (you may be resolving a problem for a circumstance that should never be happening in the first place).

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15

Really? Great!
It would simplify things. Let me test that. :slight_smile:

Yes this was my mistake.
When making this post I pulled out the schematic I wrote a few months ago and changed it were necessary to match all the improvements.

In prototyping I was using another button as a manual reset so I needed a pull up resistor.Then I switched to the PG, but I didn’t modify schematic to match.
Bob drew my attention to that part of the schematic when he noticed that capacitor.

I fixed it below :).

Let me try a more aggressive pull down resistor, maybe a 3.3k resistor, at the source of the mosfet. To absolutely rule this out I am going to measure the reset signal with my oscilloscope after work. :slight_smile:

16

Being thinking about this a lot over last few hours, think it is being over designed.
‘ResetVector’ requirements.
PG LOW ResetVector LOW.
PG HIGH ResetVector HIGH.

The datasheet says:
PG is open drain and needs an external pullup resistor.
PG can sink 3mA.

2k4 would sink 2mA at 5V, 10k 0.5mA which probably would work.

I would need one of these regulators to test this.
But my conclusion is PG can be connected to the reset pins with a 2k4 pullup.

Cheers
Jim

17

Hi Pix
This reply is in connection with your use of a FET to switch “PG” as a reset.
Besides the fact that the PG pin will probably NOT drive the FET this FET is essentially used as a high side switch. You cannot use a N channel FET here without some sort of charge pump keeping the gate voltage ABOVE the source voltage. In other words this CANNOT work.

A FET used in this high switching set up has to be P channel and the gate has to be taken LOW to switch on.

You would be better off connecting pin 2 of the '73 high and delaying the 555 start up at switch on.
The following might explain a bit better, hope you can read it.

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Cheers Bob

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18

I’ll run this test tonight as well. :slight_smile:

This might be a good backup if I can’t get the PG line to work.
I do need reset vectors of other boards in the project so it’s preferable to get the PG line working. But if I can’t get it working I’m tempted to give each module it’s own RC filter as a reset.

19

Hi Pix

If you need to fan out this PG signal to other boards you would be better off using an OPAmp configured as a voltage follower to supply any bit of current required.
Connect the OpAmp output to individual destinations via resistors of a few k to limit any current excursions. If you use an OpAmp that will be OK at 12V you can power it from there without any worry about rail to rail devices.
You would need to power such an OpAmp from the 12V anyway as it would be a bit pointless powering it from the same supply that is being monitored.
Cheers Bob
Add On:
The OpAmp has to be a push/pull output that is it drives the load high and sinks low so the output is never left floating, I think most will satisfy this but stay away from “open collector” or “open drain” outputs.

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20

Ignore me here…
I just cant help it… what was wrong with a small micro controller e.g. ATTiny would do all this and 1 chip (button press, software debounce, trigger output as needed or inverted… LOL

OK, to be fair, its about learning how things work and the use of components without the need to program, so fair enough…

But I had to say it.

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