The board you see here is the “driver board” I guess, meaning that it has the MCU that controls all the daughter boards. The stackable backplane (stackplane) has all the signals required to talk to peripheral chips.
Here’s the current pinout.
There are three headers, a 24-pin that have the data signals and two 3-pin ones that have power, one of them (P3) is optionally a 7-pin to allow for 4 user-defined signals.
In simple mode the system works as per all other such boards and the signals are as shown here as net names. But if you want to address boards and use “interrupts” then you lose the ADC and/or DIO signals as it is assumed that IO is performed entirely by daughter boards using I2C/SPI IO chips. In this case the names in blue tell the functions, IE BSn (board select) and the interrupt signals.
I will probably have some combination of the two modes that allows direct IO from the MCU and addressable daughter boards as well.
The schematic shows duplicates of each header, that is because they are really SMD header/socket pairs on each side of the board.
There is provision to solder side panels and a “lid” to make the system self enclosing, IE no box required unless you really need a high IP rating.
