This is the latest iteration of an idea I’ve had for several years and even posted about here before. I have however simplified the design and changed the host processor to a Pico.
The first item being designed is a carrier board for the Raspberry Pi Pico that can have up to eight other addressed boards stacked or any number of unaddressed boards.
More details can be found on this web page I knocked up as a temporary measure until the project gets it’s own web site.
And a PDF of the current schematic here.
schematic.pdf (294.1 KB)
I’ve never had any dealings with the Pico and haven’t started laying out tracks yet so it’s not too hard to change things and if anyone here has some input it will be gladly accepted.
Ah yeah! I remember when you mentioned this on a Factory Episode thread! Good so see you’re still keen on it.
If you haven’t worked with the Pico before pick one up and see how it goes to get familiar with the user experience. A fair bit has changed since 2021 as well - they have wifi now
Life got in the way since then, and now I’m extending my house which take up most of my energy but I still have some spare time at night
Just a little status update. The MCU boards have been fabbed but I’ve already decided on some changes so I doubt I’ll populate them, after all they cost naff all so I’ll just get some more made when I’ve made the changes.
Meanwhile here are five of them stacked, giving some idea of where the QUUB name came from
Of course one would not stack five MCU boards, I just wanted to check the mechanical aspects of the idea.
Now I understand the namesake very tidy.
How will the boards communicate? Will there be a driver board and other device boards respond over eg. i2c?
The board you see here is the “driver board” I guess, meaning that it has the MCU that controls all the daughter boards. The stackable backplane (stackplane) has all the signals required to talk to peripheral chips.
Here’s the current pinout.
There are three headers, a 24-pin that have the data signals and two 3-pin ones that have power, one of them (P3) is optionally a 7-pin to allow for 4 user-defined signals.
In simple mode the system works as per all other such boards and the signals are as shown here as net names. But if you want to address boards and use “interrupts” then you lose the ADC and/or DIO signals as it is assumed that IO is performed entirely by daughter boards using I2C/SPI IO chips. In this case the names in blue tell the functions, IE BSn (board select) and the interrupt signals.
I will probably have some combination of the two modes that allows direct IO from the MCU and addressable daughter boards as well.
The schematic shows duplicates of each header, that is because they are really SMD header/socket pairs on each side of the board.
There is provision to solder side panels and a “lid” to make the system self enclosing, IE no box required unless you really need a high IP rating.